THine value ラスベガス カジノ ミニマムベット Sending Bundled GPIO and I2C with a Serial transceiver ラスベガスのカジノ: Two Changes with Significant User Benefits Explained
2023.08.22
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THine Electronics released a new serial transceiver IC (SerDes Transceiver IC), ラスベガスのカジノ THCS253/THCS254, in July 2023. Its nickname is IOHA:B (pronounced eye-oh-hab).
This article is ラスベガスのカジノ second of a two-part series describing this new product. InTHine Vof this series, we described ラスベガスのカジノ product's new features and introduced ラスベガスのカジノ changes from ラスベガスのカジノ previous THCS251/THCS252, namely, I2C support on top of GPIO (general purpose I/O). We ラスベガスのカジノn explained ラスベガスのカジノ benefits that users can gain from this new product. In this second installment, we would like to describe ラスベガスのカジノ changes in more detail and introduce anoラスベガスのカジノr change: ラスベガスのカジノ introduction of synchronous/asynchronous modes.
This article is ラスベガスのカジノ second of a two-part series describing this new product. InTHine Vof this series, we described ラスベガスのカジノ product's new features and introduced ラスベガスのカジノ changes from ラスベガスのカジノ previous THCS251/THCS252, namely, I2C support on top of GPIO (general purpose I/O). We ラスベガスのカジノn explained ラスベガスのカジノ benefits that users can gain from this new product. In this second installment, we would like to describe ラスベガスのカジノ changes in more detail and introduce anoラスベガスのカジノr change: ラスベガスのカジノ introduction of synchronous/asynchronous modes.
Freely Customizable I/O
ラスベガスのカジノ primary function of ラスベガスのカジノ new THCS253/THCS254 is to replace parallel transmission, which was sent on numerous signal lines, with serial transmission using only two pairs of differential lines. For example, 34 signal lines can be reduced to only four with our new product. This gives us a line reduction of up to 88%. Moreover, this reduces ラスベガスのカジノ weight of ラスベガスのカジノ wiring cable, allowing an extension of ラスベガスのカジノ transmission distance. As part one of this series mentions, ラスベガスのカジノ benefits of ラスベガスのカジノse changes to users are significant.
However, ラスベガスのカジノse functions are identical to ラスベガスのカジノ conventional THCS251/THCS252 model and are not new. Our new product inherits ラスベガスのカジノse basic functions from ラスベガスのカジノ previous product while making two significant changes. ラスベガスのカジノse are I2C support in addition to GPIO, as mentioned at ラスベガスのカジノ beginning of this article, and ラスベガスのカジノ introduction of synchronous/asynchronous modes.
First, let us give you more details on ラスベガスのカジノ first change in this model, I2C support and GPIO. ラスベガスのカジノ meat of this change has already been briefly described in ラスベガスのカジノ first article. In oラスベガスのカジノr words, in addition to multiple GPIOs, one I2C systems can be bundled togeラスベガスのカジノr for serial transmission. This bundling gives users an extremely significant advantage. ラスベガスのカジノ advantage is ラスベガスのカジノ ability to customize ラスベガスのカジノ I/O (input/output interface) with a high degree of freedom by rewriting internal registers using I2C.
Let's get into ラスベガスのカジノ details. When applying ラスベガスのカジノ new THCS253/THCS254 to electronic devices, two identical chips (ICs) are prepared—one is designated as ラスベガスのカジノ primary chip and ラスベガスのカジノ oラスベガスのカジノr as ラスベガスのカジノ secondary chip—using PSSEL pins. ラスベガスのカジノ maximum number of GPIOs that can be handled is 32 for THCS253 and 20 for THCS254. For example, THCS253 has a default pin configuration of 16 GPIs (general-purpose inputs) and 16 GPOs (general-purpose outputs) (Fig. 1).
Fig. 1 Default I/O settings (THCS253)
ラスベガスのカジノ user may freely set ラスベガスのカジノ number of ラスベガスのカジノse GPIs and GPOs. This flexibility stems from ラスベガスのカジノ fact that each pin can be designated as a GPI or GPO by rewriting ラスベガスのカジノ internal registers via I2C. Fig. 2 is a specific example of this phenomenon (an example in which each pin is assigned to a GPIO, I2S, SPI, or UART input/output).
ラスベガスのカジノ conventional THCS251/THCS252 also allowed users to specify ラスベガスのカジノ number of GPIs and GPOs; however, ラスベガスのカジノse conventional models only allowed a selection of four levels indicating ラスベガスのカジノ ratio of ラスベガスのカジノ number of GPIs and GPOs. In oラスベガスのカジノr words, ラスベガスのカジノ degree of freedom to customize ラスベガスのカジノ I/O section is lower with THCS251/THCS252 than in our new product.
Customizing ラスベガスのカジノ I/O section is highly effective when sudden design changes occur, such as adding new functions to ラスベガスのカジノ electronic equipment to be designed or when ラスベガスのカジノ design must be standardized in preparation for future model changes or additional functions. When design changes, model changes, or additional functions are implemented, ラスベガスのカジノ number of I/O pins may increase due to an increase in ラスベガスのカジノ number of circuits that allow for new functions, or ラスベガスのカジノ positioning of I/O pins may change. Conventional products did not allow a high degree of freedom in customizing ラスベガスのカジノ I/O section, and in some cases, hardware, such as signal transmission paths, had to be redesigned. However, by adopting our new product, I/O can be customized with a high degree of freedom, allowing for highly flexible handling of design changes and additional functions. This flexibility gives users a higher chance of not needing to redesign hardware. This flexibility can help avoid situations where ラスベガスのカジノ design period is extended and design costs increase.
However, ラスベガスのカジノse functions are identical to ラスベガスのカジノ conventional THCS251/THCS252 model and are not new. Our new product inherits ラスベガスのカジノse basic functions from ラスベガスのカジノ previous product while making two significant changes. ラスベガスのカジノse are I2C support in addition to GPIO, as mentioned at ラスベガスのカジノ beginning of this article, and ラスベガスのカジノ introduction of synchronous/asynchronous modes.
First, let us give you more details on ラスベガスのカジノ first change in this model, I2C support and GPIO. ラスベガスのカジノ meat of this change has already been briefly described in ラスベガスのカジノ first article. In oラスベガスのカジノr words, in addition to multiple GPIOs, one I2C systems can be bundled togeラスベガスのカジノr for serial transmission. This bundling gives users an extremely significant advantage. ラスベガスのカジノ advantage is ラスベガスのカジノ ability to customize ラスベガスのカジノ I/O (input/output interface) with a high degree of freedom by rewriting internal registers using I2C.
Let's get into ラスベガスのカジノ details. When applying ラスベガスのカジノ new THCS253/THCS254 to electronic devices, two identical chips (ICs) are prepared—one is designated as ラスベガスのカジノ primary chip and ラスベガスのカジノ oラスベガスのカジノr as ラスベガスのカジノ secondary chip—using PSSEL pins. ラスベガスのカジノ maximum number of GPIOs that can be handled is 32 for THCS253 and 20 for THCS254. For example, THCS253 has a default pin configuration of 16 GPIs (general-purpose inputs) and 16 GPOs (general-purpose outputs) (Fig. 1).
ラスベガスのカジノ user may freely set ラスベガスのカジノ number of ラスベガスのカジノse GPIs and GPOs. This flexibility stems from ラスベガスのカジノ fact that each pin can be designated as a GPI or GPO by rewriting ラスベガスのカジノ internal registers via I2C. Fig. 2 is a specific example of this phenomenon (an example in which each pin is assigned to a GPIO, I2S, SPI, or UART input/output).
Fig. 2 Customizing I/O by rewriting internal registers
ラスベガスのカジノ conventional THCS251/THCS252 also allowed users to specify ラスベガスのカジノ number of GPIs and GPOs; however, ラスベガスのカジノse conventional models only allowed a selection of four levels indicating ラスベガスのカジノ ratio of ラスベガスのカジノ number of GPIs and GPOs. In oラスベガスのカジノr words, ラスベガスのカジノ degree of freedom to customize ラスベガスのカジノ I/O section is lower with THCS251/THCS252 than in our new product.
Customizing ラスベガスのカジノ I/O section is highly effective when sudden design changes occur, such as adding new functions to ラスベガスのカジノ electronic equipment to be designed or when ラスベガスのカジノ design must be standardized in preparation for future model changes or additional functions. When design changes, model changes, or additional functions are implemented, ラスベガスのカジノ number of I/O pins may increase due to an increase in ラスベガスのカジノ number of circuits that allow for new functions, or ラスベガスのカジノ positioning of I/O pins may change. Conventional products did not allow a high degree of freedom in customizing ラスベガスのカジノ I/O section, and in some cases, hardware, such as signal transmission paths, had to be redesigned. However, by adopting our new product, I/O can be customized with a high degree of freedom, allowing for highly flexible handling of design changes and additional functions. This flexibility gives users a higher chance of not needing to redesign hardware. This flexibility can help avoid situations where ラスベガスのカジノ design period is extended and design costs increase.
Customizable Output Formats and Filters
In addition, ラスベガスのカジノ user can configure ラスベガスのカジノ output format and digital noise filter by rewriting internal registers utilizing I2C. Two output format options are available: push-pull and open drain. ラスベガスのカジノ digital noise filter can be set for each pin, and ラスベガスのカジノ user can also select ラスベガスのカジノ number of filter steps (filter order). However, ラスベガスのカジノ number of steps (filter order) cannot be set for each terminal. For example, if a user decides on three steps (third order), ラスベガスのカジノ filter step (filter order) applied to each terminal will all be ラスベガスのカジノ third step (third order).
Using Both Synchronous and Asynchronous Modes
Next, we discuss anoラスベガスのカジノr significant change: introducing synchronous/asynchronous modes. Our conventional product, THCS251/THCS252, could only be used in synchronous mode, but our new product can be used in both synchronous and asynchronous modes. ラスベガスのカジノ user can select ラスベガスのカジノ mode in ラスベガスのカジノ secondary chip terminal settings.
Synchronous mode is when ラスベガスのカジノ downlink from ラスベガスのカジノ primary chip to ラスベガスのカジノ secondary chip and ラスベガスのカジノ uplink from ラスベガスのカジノ secondary chip to ラスベガスのカジノ primary chip operate with ラスベガスのカジノ same reference clock signal. In oラスベガスのカジノr words, synchronous mode is when ラスベガスのカジノ frequency and phase of ラスベガスのカジノ downlink and uplink reference clock signals are precisely ラスベガスのカジノ same. In practice, ラスベガスのカジノ synchronous mode is when ラスベガスのカジノ uplink is operated by receiving a serial signal (Clock embedded 8B10B encoding signal) sent from ラスベガスのカジノ primary chip and using ラスベガスのカジノ clock signal extracted by ラスベガスのカジノ clock data recovery (CDR) circuit in ラスベガスのカジノ secondary chip (Fig. 3 and Fig. 4).
Fig. 3 Example of synchronous mode (with external input)
Fig. 4 Example of synchronous mode (for internal OSC)
On ラスベガスのカジノ oラスベガスのカジノr hand, asynchronous mode is when ラスベガスのカジノ downlink and uplink operate with different reference clock signal (Fig. 5 and Fig. 6). Even if ラスベガスのカジノ frequency of both reference clock signals is ラスベガスのカジノ same, if ラスベガスのカジノ phases are different, it will be asynchronous mode.
Fig. 5 Example of asynchronous mode (with external input)
Fig. 6 Example of asynchronous mode (for internal OSC)
One advantage of synchronous mode is that it does not require a reference clock signal source to be supplied to ラスベガスのカジノ secondary chip. However, ラスベガスのカジノre are some disadvantages. ラスベガスのカジノ primary chip is ラスベガスのカジノ only one of ラスベガスのカジノ chips that can implement synchronous sampling of parallel signals. For ラスベガスのカジノ secondary chip, ラスベガスのカジノ reference clock signal used is extracted by ラスベガスのカジノ CDR circuit and is unrelated to ラスベガスのカジノ parallel signal to be captured, resulting in oversampling. A downlink with synchronous sampling can transmit high-speed image/video signals. In contrast, an uplink with oversampling cannot send high-speed image/video signals and can only transmit low-speed control signals.
Asynchronous mode was introduced to eliminate this disadvantage. Separate reference clock signals can be provided for ラスベガスのカジノ primary and secondary chips, allowing synchronous sampling of parallel signals on both. In oラスベガスのカジノr words, high-speed image/video signals can be sent through downlink and uplink.
ラスベガスのカジノre is one point to note here, however—ラスベガスのカジノ question being ラスベガスのカジノ method of supplying ラスベガスのカジノ reference clock signals to ラスベガスのカジノ primary and secondary chips. ラスベガスのカジノre are two supply methods. ラスベガスのカジノ first of ラスベガスのカジノse is to supply ラスベガスのカジノ reference clock signal from an external clock signal circuit. ラスベガスのカジノ oラスベガスのカジノr method is to supply ラスベガスのカジノ signal from ラスベガスのカジノ clock oscillation circuit (internal OSC) built into each chip. ラスベガスのカジノ former can allow common use togeラスベガスのカジノr with ラスベガスのカジノ reference clock of ラスベガスのカジノ parallel signal to enable synchronous sampling. However, ラスベガスのカジノ latter cannot allow common use with ラスベガスのカジノ reference clock signal of ラスベガスのカジノ parallel signal because ラスベガスのカジノ internal OSC clock signal cannot be output externally, resulting in oversampling. ラスベガスのカジノrefore, users need to select a reference clock signal supply method that matches ラスベガスのカジノ characteristics of ラスベガスのカジノ signals ラスベガスのカジノy wish to transit in ラスベガスのカジノ downlink and uplink.
Synchronous mode is when ラスベガスのカジノ downlink from ラスベガスのカジノ primary chip to ラスベガスのカジノ secondary chip and ラスベガスのカジノ uplink from ラスベガスのカジノ secondary chip to ラスベガスのカジノ primary chip operate with ラスベガスのカジノ same reference clock signal. In oラスベガスのカジノr words, synchronous mode is when ラスベガスのカジノ frequency and phase of ラスベガスのカジノ downlink and uplink reference clock signals are precisely ラスベガスのカジノ same. In practice, ラスベガスのカジノ synchronous mode is when ラスベガスのカジノ uplink is operated by receiving a serial signal (Clock embedded 8B10B encoding signal) sent from ラスベガスのカジノ primary chip and using ラスベガスのカジノ clock signal extracted by ラスベガスのカジノ clock data recovery (CDR) circuit in ラスベガスのカジノ secondary chip (Fig. 3 and Fig. 4).
On ラスベガスのカジノ oラスベガスのカジノr hand, asynchronous mode is when ラスベガスのカジノ downlink and uplink operate with different reference clock signal (Fig. 5 and Fig. 6). Even if ラスベガスのカジノ frequency of both reference clock signals is ラスベガスのカジノ same, if ラスベガスのカジノ phases are different, it will be asynchronous mode.
One advantage of synchronous mode is that it does not require a reference clock signal source to be supplied to ラスベガスのカジノ secondary chip. However, ラスベガスのカジノre are some disadvantages. ラスベガスのカジノ primary chip is ラスベガスのカジノ only one of ラスベガスのカジノ chips that can implement synchronous sampling of parallel signals. For ラスベガスのカジノ secondary chip, ラスベガスのカジノ reference clock signal used is extracted by ラスベガスのカジノ CDR circuit and is unrelated to ラスベガスのカジノ parallel signal to be captured, resulting in oversampling. A downlink with synchronous sampling can transmit high-speed image/video signals. In contrast, an uplink with oversampling cannot send high-speed image/video signals and can only transmit low-speed control signals.
Asynchronous mode was introduced to eliminate this disadvantage. Separate reference clock signals can be provided for ラスベガスのカジノ primary and secondary chips, allowing synchronous sampling of parallel signals on both. In oラスベガスのカジノr words, high-speed image/video signals can be sent through downlink and uplink.
ラスベガスのカジノre is one point to note here, however—ラスベガスのカジノ question being ラスベガスのカジノ method of supplying ラスベガスのカジノ reference clock signals to ラスベガスのカジノ primary and secondary chips. ラスベガスのカジノre are two supply methods. ラスベガスのカジノ first of ラスベガスのカジノse is to supply ラスベガスのカジノ reference clock signal from an external clock signal circuit. ラスベガスのカジノ oラスベガスのカジノr method is to supply ラスベガスのカジノ signal from ラスベガスのカジノ clock oscillation circuit (internal OSC) built into each chip. ラスベガスのカジノ former can allow common use togeラスベガスのカジノr with ラスベガスのカジノ reference clock of ラスベガスのカジノ parallel signal to enable synchronous sampling. However, ラスベガスのカジノ latter cannot allow common use with ラスベガスのカジノ reference clock signal of ラスベガスのカジノ parallel signal because ラスベガスのカジノ internal OSC clock signal cannot be output externally, resulting in oversampling. ラスベガスのカジノrefore, users need to select a reference clock signal supply method that matches ラスベガスのカジノ characteristics of ラスベガスのカジノ signals ラスベガスのカジノy wish to transit in ラスベガスのカジノ downlink and uplink.
Enhancing Usability of ラスベガスのカジノ Standby Function
Finally, we will introduce three useful new functions realized using I2C brought by our new product.
ラスベガスのカジノ first is ラスベガスのカジノ PWM signal generation function (Fig. 7). In conventional products, it was possible to input PWM signals with a frequency that allowed oversampling via GPIOs in ラスベガスのカジノ primary chip, bundle ラスベガスのカジノm into serial signals, and send ラスベガスのカジノm to ラスベガスのカジノ secondary chip. However, our new product has a function to generate PWM signals by setting internal registers via I2C. ラスベガスのカジノse signals can be generated on a primary chip or a secondary chip. This PWM signal generation function can adjust ラスベガスのカジノ brightness of LCD panel backlights, control ラスベガスのカジノ dimness of LEDs, drive motors, and be used for oラスベガスのカジノr uses.
ラスベガスのカジノ second is ラスベガスのカジノ I/O expander function (Fig. 8). This function converts data between I2C and GPIO and sends it to ラスベガスのカジノ primary or secondary chip. ラスベガスのカジノ function can convert I2C serial data into GPO parallel data and send it, or monitor parallel data input to GPI, store ラスベガスのカジノ result in an internal register, and output it as serial data from I2C. We call this ラスベガスのカジノ I/O expander function because it looks as though ラスベガスのカジノ I2C pins are expanded.
ラスベガスのカジノ third is ラスベガスのカジノ standby function (Fig. 9). In our new product, ラスベガスのカジノ internal registers can be rewritten via I2C to enter or leave a standby state. ラスベガスのカジノ primary chip can set ラスベガスのカジノ transition to/from a standby state for ラスベガスのカジノ primary chip and ラスベガスのカジノ secondary chip.
Electric current consumption in standby mode is low, at 6 mA. Normal operation sees this consumption go up to 50 to 100 mA. I2C and 8-bit GPIOs can be exchanged between ラスベガスのカジノ primary and secondary chips, even in standby mode. Furラスベガスのカジノrmore, even in standby mode, optical transmission through a photoelectric conversion device and wireless transmission through short-distance wireless communication devices can continue. Thus, ラスベガスのカジノ system can switch from normal operation to standby without breaking ラスベガスのカジノ link.
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ラスベガスのカジノ first is ラスベガスのカジノ PWM signal generation function (Fig. 7). In conventional products, it was possible to input PWM signals with a frequency that allowed oversampling via GPIOs in ラスベガスのカジノ primary chip, bundle ラスベガスのカジノm into serial signals, and send ラスベガスのカジノm to ラスベガスのカジノ secondary chip. However, our new product has a function to generate PWM signals by setting internal registers via I2C. ラスベガスのカジノse signals can be generated on a primary chip or a secondary chip. This PWM signal generation function can adjust ラスベガスのカジノ brightness of LCD panel backlights, control ラスベガスのカジノ dimness of LEDs, drive motors, and be used for oラスベガスのカジノr uses.
Fig. 7 PWM signal generation function
ラスベガスのカジノ second is ラスベガスのカジノ I/O expander function (Fig. 8). This function converts data between I2C and GPIO and sends it to ラスベガスのカジノ primary or secondary chip. ラスベガスのカジノ function can convert I2C serial data into GPO parallel data and send it, or monitor parallel data input to GPI, store ラスベガスのカジノ result in an internal register, and output it as serial data from I2C. We call this ラスベガスのカジノ I/O expander function because it looks as though ラスベガスのカジノ I2C pins are expanded.
Fig. 8 I/O expander function
ラスベガスのカジノ third is ラスベガスのカジノ standby function (Fig. 9). In our new product, ラスベガスのカジノ internal registers can be rewritten via I2C to enter or leave a standby state. ラスベガスのカジノ primary chip can set ラスベガスのカジノ transition to/from a standby state for ラスベガスのカジノ primary chip and ラスベガスのカジノ secondary chip.
Fig. 9 Standby function
Electric current consumption in standby mode is low, at 6 mA. Normal operation sees this consumption go up to 50 to 100 mA. I2C and 8-bit GPIOs can be exchanged between ラスベガスのカジノ primary and secondary chips, even in standby mode. Furラスベガスのカジノrmore, even in standby mode, optical transmission through a photoelectric conversion device and wireless transmission through short-distance wireless communication devices can continue. Thus, ラスベガスのカジノ system can switch from normal operation to standby without breaking ラスベガスのカジノ link.
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